MCE0010:
#      Bin     sym        Note
#      ------------------------------------------------------------------------
        1       +         PASS;
	2       2         Open-short;
	3       3         Leakage;
	4       4         Idd;
	5       5         Inputs Iil Leakage;
	6       6         Ioh leakage;
	7       7         Iol leakage;
	8       8         Idd2 (5.5V);
	9       9         Idd3 (5.5V);
       10       A         Match; 
       11       B         CPU;
       12       C         card state register test;
       13       D         ic_current_state register test;
       14       E         ins register test;
       15       F         SCI;
       16       G         data register of fram interface test;
       17       H         CPU~ROM2;
       18       I         READ 55AA;
       19       J         HALF 55AA;
       20       K         m_seq register test;
       21       L         page;
       22       M         128 bit data latch test;
       23       N         END WITH STATE AND SHIFT REGISTERS TEST;
       24       O         half_00FF;
       25       P         half_FF00;
       26       Q         read fram, start ;
       27       R         half_AA55;
       28       S         chip_FF;
       29       T         run1 block12-15 pass;
       30       U         run1 sector2 pass;
       31       V         EEPROM;
       32       W         write full fram, run2;
       33       X         read fram, run2;
       34       Y         run2 block0 pass; 
       35       Z         run2 block 4-11 pass;
       36       a         run2 sector12-15 pass;
       37       b         run2 part2 pass  ;
       38       c         run2 part3 pass  ;
       39       d         run2 part4 pass;
       40       e         WRITE FRAM;
       41       f         COMMAND REQI;
       42       g         COMMAND ANTICOLLISION;
       43       h         COMMAND SELECT;
       44       i         COMMAND AUTHA;
       45       j         COMMAND INCREMENT;
       46       k         COMMAND TRANSFER;
       47       l         COMMAND RESTORE;
       48       m         COMMAND DECREMENT;
       49       n         COMMAND HALT;
       50       o         COMMAND REQA;
       51       p         COMMAND SELECT;
       52       q         COMMAND AUTHB;
       53       r         COMMAND CHANGE AC;
       54       s         COMMAND READ AC;
       55       t         COMMAND CHANGE KEYA;
       56       u         COMMAND CHANGE KEYB;
       57       v         COMMAND REQA;
       58       w         COMMAND SELECT;
       59       x         COMMAND INITIALIZATION;
       60       A         Match 4.5v;
       65	F	  SCI 4.5V;
	67	/	  CPU~ROM2 4.5V;
       68       I         READ 55AA 4.5V;
       69	J	  HALF 55AA 4.5V;
       78       S         chip_FF 4.5V;
       119	J	  HALF 55AA 5.5V;
       81       V         EEPROM 4.5V;
       115	F	  SCI 5.5v;
       118      I         READ 55AA 5.5v;
       131      V         EEPROM 5.5v;
	61	B	  CPU 4.5v;
	111	B	  CPU 5.5v;
	110	A	  Match 5.5v;
	117	/	  CPU~ROM2 5.5V;
       128      S         chip_FF 5.5V;

